AccANN

AccANN

Charmve

🐆 A compiler from AI model to RTL (Verilog) accelerator in FPGA hardware with auto design space exploration for *AdderNet*

hardware
View on GitHub
22 Stars
1 Forks
2 Watchers
65.3 SrcLog Score
Cost to Build
$21.2K
Market Value
$19.5K
How is this calculated?

Growth over time

13 data points  ·  2021-07-01 → 2026-11-01
Stars Forks Watchers
💬

How do you feel about this project?

Ask AI about AccANN

Question copied to clipboard

What is the Charmve/AccANN GitHub project? Description: "🐆 A compiler from AI model to RTL (Verilog) accelerator in FPGA hardware with auto design space exploration for *AdderNet*". Explain what it does, its main use cases, key features, and who would benefit from using it.

Question is copied to clipboard — paste it after the AI opens.

🏆 Show off this rank

Charmve/AccANN on SrcLog (holo style)

Add it to a GitHub README or profile — the card updates as the ranking changes:

How to clone AccANN

Clone via HTTPS

git clone https://github.com/Charmve/AccANN.git

Clone via SSH

[email protected]:Charmve/AccANN.git

Download ZIP

Download main.zip

Found an issue?

Report bugs or request features on the AccANN issue tracker:

Open GitHub Issues

Similar to AccANN

anypixel Marketing-for-Engineers gobot node-serialport openvr platformio-core awesome-electronics Hackintosh-Installer-University librealsense blynk-library lelylan blynk-server periph pyusb awesome-vehicle-security NyuziProcessor go-hardware Neural-Networks-on-Silicon UsbSerial pgtune wrmhl platformio-atom-ide ansible-provisioning w1thermsensor attifyos PipeCNN trezor-mcu node-escpos trezor-agent msi-keyboard