Micro-processor-Design-Verification

ShwetaKiranTotla

Design Verification of Flash, UART, and SDRAM controller for a 32 bit embedded RISC microprocessor using cocotb.

flash

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5 Stars

0 Forks

5 Watchers

Verilog Language

Cost to Build

$5.2K

Market Value

$3.6K

How is this calculated?

Growth over time

1 data points · 2025-08-05 → 2025-08-05

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What is the ShwetaKiranTotla/Micro-processor-Design-Verification GitHub project? Description: "Design Verification of Flash, UART, and SDRAM controller for a 32 bit embedded RISC microprocessor using cocotb.". Written in Verilog. Explain what it does, its main use cases, key features, and who would benefit from using it.

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