SPK286

SPK286

spark2k06

Synthesizable Intel 80286-compatible CPU core in SystemVerilog, with project-owned microcode, real and protected mode, and verification against hardware-captured 80286 test data.

7 Stars
0 Forks
0 Watchers
SystemVerilog Language
mit License
61.1 SrcLog Score
Cost to Build
$67.3K
Market Value
$73.8K

Growth over time

1 data points  ·  2026-11-01 → 2026-11-01
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What is the spark2k06/SPK286 GitHub project? Description: "Synthesizable Intel 80286-compatible CPU core in SystemVerilog, with project-owned microcode, real and protected mode, and verification against hardware-captured 80286 test data.". Written in SystemVerilog. Explain what it does, its main use cases, key features, and who would benefit from using it.

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How to clone SPK286

Clone via HTTPS

git clone https://github.com/spark2k06/SPK286.git

Clone via SSH

[email protected]:spark2k06/SPK286.git

Download ZIP

Download main.zip

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