fpga_rtc_alarm_clock

splinedrive

fpga i2c rtc oled based clock with alarm supports buzzer

alarm

View on GitHub

16 Stars

2 Forks

16 Watchers

Verilog Language

isc License

Cost to Build

$5.6K

Market Value

$8.1K

How is this calculated?

Growth over time

7 data points · 2021-08-01 → 2025-08-01

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What is the splinedrive/fpga_rtc_alarm_clock GitHub project? Description: "fpga i2c rtc oled based clock with alarm supports buzzer". Written in Verilog. Explain what it does, its main use cases, key features, and who would benefit from using it.

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How to clone fpga_rtc_alarm_clock

Clone via HTTPS

git clone https://github.com/splinedrive/fpga_rtc_alarm_clock.git

Clone via SSH

[email protected]:splinedrive/fpga_rtc_alarm_clock.git

Download ZIP

Download master.zip

Found an issue?

Report bugs or request features on the fpga_rtc_alarm_clock issue tracker:

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