Three-surface (NPU + CPU + iGPU) concurrency architecture for the AMD Strix Halo APU: Lemonade/FLM on the XDNA 2 NPU (36-39 tok/s), a class-based request router, and the honest 39.1% accuracy-gate failure that keeps small-NPU routing shadow-only. PolyForm noncommercial.
Production ROCm llama.cpp build recipe for AMD Strix Halo (gfx1151, Ryzen AI MAX+ 395) — plus seven-model serving runbooks, KV-cache sizing against a unified-memory budget, sanitized systemd units, and a pitfalls doc of the failures that cost real days. PolyForm noncommercial.
vLLM on ROCm 7.2.2 for AMD Strix Halo (gfx1151): source-build recipe, upstream patches, environment lockfile, systemd unit — and both the failed ROCm 7.1.3 and successful 7.2.2 build logs so you skip the wrong half. PolyForm noncommercial.