Verified Software Toolchain
An open source tool for testing and profiling FaaS and serverless platforms
AutoSVA is a tool to automatically generate formal testbenches for unit-level RTL verification. The goal is to, based on annotations made in the signal declaration section of an RTL module, generate liveness properties so that the module would eventually make forward progress.
Simulator framework for analysis of performance, energy consumption, area and cost of multi-node multi-chiplet tile-based manycore designs
Identify and reduce instances of underutilization by the users of high-performance computing systems