Add it to a GitHub README or profile β the card updates as the ranking changes:
General RDMA transport between two Strix Halo hosts over Thunderbolt/USB4 NHI DMA rings: a native software-verbs provider with a zero-copy data plane, plus the USB4STREAM backport it builds on
Text embeddings on AMD XDNA NPU (Strix Halo) β OpenAI-compatible /v1/embeddings endpoint powered by all-MiniLM-L6-v2 running on the NPU tile array