verilog2factorio

Redcrafter

This project will compile verilog (a hardware description language) into factorio blueprints.

compiler

View on GitHub Website

784 Stars

22 Forks

784 Watchers

TypeScript Language

gpl-3.0 License

Cost to Build

$379.7K

Market Value

$1.28M

How is this calculated?

Growth over time

7 data points · 2021-08-01 → 2025-08-01

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What is the Redcrafter/verilog2factorio GitHub project? Description: "This project will compile verilog (a hardware description language) into factorio blueprints.". Written in TypeScript. Explain what it does, its main use cases, key features, and who would benefit from using it.

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How to clone verilog2factorio

Clone via HTTPS

git clone https://github.com/Redcrafter/verilog2factorio.git

Clone via SSH

[email protected]:Redcrafter/verilog2factorio.git

Download ZIP

Download master.zip

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Report bugs or request features on the verilog2factorio issue tracker:

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