sdr-psk-fpga

Teddy-van-Jerry

Dual-Mode PSK Transceiver on SDR With FPGA

amd synchronization

View on GitHub Website

41 Stars

13 Forks

41 Watchers

Verilog Language

mit License

Cost to Build

$18.78M

Market Value

$39.22M

How is this calculated?

Growth over time

2 data points · 2025-03-17 → 2025-09-20

Stars Forks Watchers

💬

How do you feel about this project?

Ask AI about sdr-psk-fpga

Question copied to clipboard

What is the Teddy-van-Jerry/sdr-psk-fpga GitHub project? Description: "Dual-Mode PSK Transceiver on SDR With FPGA". Written in Verilog. Explain what it does, its main use cases, key features, and who would benefit from using it.

Question is copied to clipboard — paste it after the AI opens.

How to clone sdr-psk-fpga

Clone via HTTPS

git clone https://github.com/Teddy-van-Jerry/sdr-psk-fpga.git

Clone via SSH

[email protected]:Teddy-van-Jerry/sdr-psk-fpga.git

Download ZIP

Download master.zip

Found an issue?

Report bugs or request features on the sdr-psk-fpga issue tracker:

Open GitHub Issues

Similar to sdr-psk-fpga

webpack madge steal wufuc conditioner awesome-vulkan esl zydis staxrip pyopencl coriander lodjs easytimer.js ocl angular-async-loader node-dependency-tree purge-wrangler require-vuejs GatelessGateSharp SimpleSvm set-egpu parenchyma node-precinct TypeScript-AMD-Boilerplate ScanTree awesome-d3d12 Tensile generator-module-boilerplate akase romania-choropleth