ML4Accel-Dataset

UT-LCA

Dataset for ML-guided Accelerator Design

hls

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36 Stars

4 Forks

36 Watchers

Verilog Language

Cost to Build

$12.56M

Market Value

$19.41M

How is this calculated?

Growth over time

1 data points · 2025-04-05 → 2025-04-05

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What is the UT-LCA/ML4Accel-Dataset GitHub project? Description: "Dataset for ML-guided Accelerator Design". Written in Verilog. Explain what it does, its main use cases, key features, and who would benefit from using it.

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How to clone ML4Accel-Dataset

Clone via HTTPS

git clone https://github.com/UT-LCA/ML4Accel-Dataset.git

Clone via SSH

[email protected]:UT-LCA/ML4Accel-Dataset.git

Download ZIP

Download master.zip

Found an issue?

Report bugs or request features on the ML4Accel-Dataset issue tracker:

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