ZCU104-ViT-Hardware-Accelerator

50.7x latency-optimized heterogeneous Vision Transformer (DeiT) hardware accelerator built on the Xilinx ZCU104 FPGA using DPU + custom HLS IPs.

hls

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Jupyter Notebook Language

42.1 SrcLog Score

Cost to Build

$2.7K

Market Value

$1.8K

How is this calculated?

Growth over time

2 data points · 2026-07-26 → 2026-08-10

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What is the Bhavin-umatiya/ZCU104-ViT-Hardware-Accelerator GitHub project? Description: "50.7x latency-optimized heterogeneous Vision Transformer (DeiT) hardware accelerator built on the Xilinx ZCU104 FPGA using DPU + custom HLS IPs.". Written in Jupyter Notebook. Explain what it does, its main use cases, key features, and who would benefit from using it.

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How to clone ZCU104-ViT-Hardware-Accelerator

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git clone https://github.com/Bhavin-umatiya/ZCU104-ViT-Hardware-Accelerator.git

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[email protected]:Bhavin-umatiya/ZCU104-ViT-Hardware-Accelerator.git

Download ZIP

Download main.zip

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